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Ever since Intel announced its 10nm ramp would be delayed into 2019, there've been questions about what caused the filibuster and what a fourth generation of 14nm hardware might offer. At the JP Morgan 46th Annual Technology Conference, Dr. Murthy Renduchintala, group president of the Technology, Systems Architecture & Customer Group and chief engineering officer at Intel Corporation, spoke at some length about the problems Intel has see with its 10nm ramp, the amount of headroom in 14nm, and the visitor'due south overall plans for the time to come.

When asked about the time to come of Intel'southward 14nm (we're upward to 14nm+++ at this point, if Intel continues to use that metric), Murthy notes:

[W]east found tremendous intra-node capability inside our xiv-nanometer process. In fact from the very commencement generation of our 14-nanometer to the latest generation of 14-nanometer production, we've been able to deliver over 70% performance comeback as a result of those intra-node modifications and desirable changes. And that's quite frankly Harlan has given united states of america the ability to make sure that we get 10-nanometer yields right earlier we go into mainstream production. And then, therefore we're comfortable with the xiv-nanometer roadmap that volition give us leadership products in the adjacent 12 to 18 months, as we seek to optimize the toll structure and yields of our x-nanometer portfolio.

Equally far as 14nm goes, that's truthful. Intel'southward 14nm+ used slightly taller fins and packed transistors a little less tightly together. This immune Kaby Lake to hit higher frequencies and meliorate power consumption figures than Skylake. Similarly, 14nm++ allowed Intel to squeeze quad-core CPUs into the same TDP range it previously offered with dual-core/quad-thread CPUs. But the 70 percent performance improvement Murthy mentions, while existent, doesn't necessarily stand for a rabbit Intel can keep pulling out of its hat. Intel may take upgraded some mobile Core i3 CPUs from 2C/4T to 4C/4T, only at that place'southward no run a risk the company will whip effectually and debut a 6C/6T Core i3 or i5 CPU in a 15W TDP based on a 14nm+++ architecture.

The situation with 14nm is analogous to what GlobalFoundries and TSMC have done with their ain process nodes — Intel just isn't calling information technology an entirely new node. Only at that place's an inevitable limit to how much fine-tuning Intel can do, and given that it never planned to keep 14nm around as long as it has, I'd wager they've depleted most of the improvements they tin offer.

What's Going On With 10nm?

Nosotros've included both of Intel'southward initial 10nm slide decks below, to requite some context to the company's claims about the procedure node and its capabilities. When asked about 10nm, Murthy said:

In terms of 10-nanometer, we are aircraft 10-nanometer in low volumes. I call up that if y'all go back to when we originally divers the recipe of ten-nanometer back in early 2014, nosotros defined some very aggressive goals for our second-generation hyper-scaling. We targeted a 2.7x scaling cistron, from fourteen-nanometers which was in the very stages of product ramp at that bespeak in time.

And 14-nanometers with in and of itself of 2.4x scaling on 22 nanometers, and then clearly our engineering science team in TMG had very, very ambitious goals in terms of the transistor scaling required… I've given ourselves no specific timeline, again it's when the economic timing makes greater sense for us in terms of when we hit the right point in the yield bend…

x-nanometer is basically with the generation that was really focusing on delivering ii.7 ex-scaling in an environs that wasn't assisted by EUV. We had to go to self aligned quad patterning which in on itself is both circuitous and time consuming. As nosotros moved to x, we've been able to deliver a recipe with the quite diversified risk contour.

These statements advise an reply to what happened to Intel's 10nm ramp and why it's so late. Put just, the visitor bit off more than it could chew. Intel's node technology has always been ahead of TSMC, Samsung, or GlobalFoundries — a 14nm flake from Intel is roughly equivalent to a 10nm CPU from one of these companies. With 10nm, equally shown on the slides above, Intel wanted to widen that gap and make upwards for the time it lost in delaying 10nm (note that this was before 10nm slid into 2019).

SemiWiki has some boosted information on this. All of the major foundries use similar methods for front end of line (FEOL) processing. But for back stop of line (BEOL), Intel uses cocky-aligned quadruple patterning as opposed to the self-aligned double patterning that other foundries have deployed. Non just does this increase costs due to the need for additional photomasks, it's a more complex process. Information technology'southward also inevitably slower, which ways wafer throughput will be lower — at to the lowest degree at offset.

It'south not clear why Intel chose to go with SAQP for BEOL at 10nm as opposed to SADP, simply Murthy's comments are straightforward. Intel'south current yields at 10nm are low and the toll curve isn't adept. The company is shipping 10nm in very limited book, only sees no benefit to jamming the throttle on 10nm when its 14nm process continues to serve information technology so well. And the truth is, Murthy is probably right.

How Much Does This Delay Hurt Intel?

There's been a lot of churr most how this delay could cripple Intel or lead to ARM's takeover of the x86 infinite. This simply isn't going to happen. AMD is challenging Intel in information centers, to be sure, simply Intel'due south determination to leave the mobile market means information technology has little to fear from rival foundries. For all the buzz about x86 emulation in Snapdragon 835 PCs, a quick glance at their performance tells you lot everything you need to know almost the underlying hardware. Tech Radar has benchmarked the x86 emulation capabilities of these systems and it'south not skilful.

x86 emulation.

Cinebench is 1 of the better tests for the Snapdragon 835's emulation, and it'south well off the Celeron N3450 (4C/4T, 1.1GHz base, 2.2GHz Turbo) in single-thread performance. Fifty-fifty in multi-threaded lawmaking, where the Snapdragon 835 has eight cores and a higher max clock than the Celeron N3450, the Intel CPU still pulls out a win. And equally I said — this is actually one of the all-time results for the Snapdragon 835'due south emulation performance.  In native code, performance is ameliorate, but not cracking.

Native lawmaking.

Here, the Snapdragon 835 with eight CPU cores loses to the three-twelvemonth-old Cadre i5-5200U. The Snapdragon 835 is an octa-cadre chip, and the i5-5200U is a 2C/4T configuration with a higher maximum frequency (2.7GHz) but fewer threads. The bespeak here is non to bash the Snapdragon 835, which offers nearly 2x the battery life of the i5-5200U system, just to point out that in terms of raw performance, Intel doesn't exactly need to lose any sleep over what'due south going on with ARM.

Could it hurt Intel with regard to AMD? Possibly. AMD is pushing for 7nm with GlobalFoundries, and while we're a bit concerned near what we've heard from GF this year, nosotros're still assuming AMD volition launch Ryzen 2 at some point in 2019. But even if we assume that AMD could state a real sucker punch on Intel, we also know that Intel has pivoted abroad from the PC market place and is focused largely on data centers. That focus and its first-class performance in that space is its ain kind of buffer. Enterprise customers move more slowly than consumer PCs, and while AMD'southward Epyc has been picking up blueprint wins, nobody — including Lisa Su, AMD's CEO — expects Epyc to seize more than four-6 percent of the server market in 2018. Qualcomm's apparent interest in exiting the ARM server market means AMD is in one case once again the only real game in town when it comes to challenging Intel in that space, and information technology's going to accept several years more for AMD to ramp upwards and win market place share.

Intel's sideslip on 10nm is pregnant. It'due south the first time in the last two decades, at least, that the company has taken so long to make a node transition. It'south absolutely opened upwardly a bit more opportunity for AMD than might otherwise exist. Simply it's also a straightforward issue related to Intel'southward decision to aggressively push for higher transistor densities at 10nm, and the apply of EUV at lower process nodes should help foreclose the problem from occurring again. In aggregate, Murthy'south overall level of confidence is well placed. Intel can't afford to rest on its laurels and ignore its competitors, but 10nm slipping into 2019 isn't going to cripple the company, either.